https://lesitedefrancois.be/en/tags/hpc/Recent content in Hpc on Le Site de FrançoisHugo -- gohugo.ioen© 2026 Françoishttps://lesitedefrancois.be/en/ai/gpu/Mon, 01 Jan 0001 00:00:00 +0000https://lesitedefrancois.be/en/ai/gpu/<p>A <strong>GPU (Graphics Processing Unit)</strong> is a specialized processor designed to execute a very large number of arithmetic operations in parallel. Its original objective was real-time rendering; in modern <strong>AI</strong> and <strong>HPC</strong> infrastructure the same silicon is used to accelerate matrix multiplications, convolutions, and other kernels that dominate neural network training and inference. Unlike a general-purpose host, a GPU optimizes for <strong>throughput</strong>: many warps or wavefronts hide memory latency while the device keeps SIMD units busy. In a data-center stack, GPUs typically sit in PCIe or NVLink-attached servers (or on integrated AI appliances) and are scheduled by frameworks such as PyTorch, TensorFlow, or vLLM through a runtime such as <strong>CUDA</strong> or ROCm.</p>https://lesitedefrancois.be/en/ai/infiniband/Mon, 01 Jan 0001 00:00:00 +0000https://lesitedefrancois.be/en/ai/infiniband/<p><strong>InfiniBand</strong> is a high-performance <strong>network fabric</strong> designed for datacenter and HPC clusters, natively supporting <strong>RDMA</strong> (Remote Direct Memory Access) with low latency, high bandwidth, and features such as adaptive routing and congestion control at the link layer. Its objective in <strong>AI</strong> is to connect many <strong>GPU</strong> servers so <strong>distributed training</strong> (gradient all-reduce via <strong>NCCL</strong>) and multi-node <strong>inference</strong> (tensor parallel, <strong>llm-d</strong> prefill/decode <strong>KV</strong> transfer) are not limited by TCP overhead on a <strong>CPU</strong>. InfiniBand NICs (e.g. NVIDIA ConnectX) present verbs APIs; subnets are managed with an <strong>Subnet Manager</strong> and partitioned for multi-tenant isolation.</p>